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0x02 - MCFG02 [default 0x03]
Name
Bits
R/W
Description
Frequency deviation:
Freq_Dev
7..0
r/w
F DEV = F XTAL /(32 ? (R+1)) where R is the Freq_Dev register value, F DEV and F XTAL are in kHz,
0 ≤ R ≤ 255
Freq_Dev default = 3, F DEV = ±100 kHz for F XTAL = 12,800 kHz
Table 17
0x03 - MCFG03 [default 0x07]
Name
Bits
R/W
Description
BR = F XTAL /(2*(C+1)*(D + 1)), where C and D are the bit rate parameters, and bit rate BR and
Bit_Rate_C
7..0
r/w
F XTAL are in kHz , 0 ≤ C ≤ 255 , D = 31 for standard applications
Bit_Rate_C default = 7, BR = 25 kb/s for F XTAL = 12,800 kHz
Table 18
0x04 - MCFG04 [default 0x1F]
Name
Bits
R/W
Description
BR = F XTAL /(2*(C+1)*(D + 1)), where C and D are the bit rate parameters, and bit rate BR and
Bit_Rate_D
7..0
r/w
F XTAL are in kHz, 15 ≤ D ≤ 255 . The default value of 31 is suitable for most applications.
Bit_Rate_D default = 31, BR = 25 kb/s for F XTAL = 12,800 kHz
Table 19
0x05 - MCFG05 [default 0xC6]
Name
Bits
R/W
Description
Rise/fall time control of Power Amplifier in OOK mode:
00 → 3 μs
PA_Ramp
7,6
r/w
01 →8.5 μs
10 → 15 μs
11 → 23 μs
Enables receiver low power mode by reducing LNA current
RX_Low_Pwr
5
r/w
0 → Low power mode off
1 → Low power mode on (suitable for most applications)
Reserved
4,3
r/w
Not used
VCO trimming:
00 → 0 mV
Trim
2,1
r/w
01 → 60 mV
10 → 120 mV
11 → 180 mV
Selection between two RF frequencies as defined by SynthRx, SynthPx, and SynthSx registers:
RF_Freq
0
r/w
0 → Frequency 1
1 → F requency 2
Table 20
0x06 - MCFG06 [default 0x6B]
Name
SynthR1
Bits
7..0
R/W
r/w
Description
RF frequency 1, R counter
R1 = 0x6B (01101011) for 434 MHz
Table 21
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TRC105 - 05/29/13
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